Prof. Dr. Helmut Graeb


PhD in Electrical Engineering

Email: graeb@tum.de
Tel: -


Helmut Graeb got his Dipl.-Ing., Dr.-Ing., and habilitation degrees from Technische Universitaet Muenchen in 1986, 1993 and 2008, respectively.

He was with Siemens Corporation, Munich, from 1986 to 1987, where he was involved in the design of DRAMs. Since 1987, he has been with the Institute of Electronic Design Automation, TUM, where he has been the head of a research group since 1993.

Dr. Graeb has, for instance, served as a Member of the Executive Committee of the ICCAD conference, as a Member or Chair of the Analog Program Subcommittees of the ICCAD, DAC, and D.A.T.E conferences, as Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS PART II: ANALOG AND DIGITAL SIGNAL PROCESSING and IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, and as a Member of the Technical Advisory Board of MunEDA GmbH Munich, which he co-founded. He is a Senior Member of IEEE (CAS) and member of VDE (ITG).

He was the recipient of the 2008 prize of the Information Technology Society (ITG) of the Association for Electrical, Electronic and Information Technologies (VDE), of the 2004 Best Teaching Award of the TUM EE Faculty Students Association, of the 3rd prize of the 1996 Munich Business Plan Contest.

Research Interests

His research interests are in design automation for analog and mixed-signal circuits, with particular emphasis on Pareto optimization of analog circuits considering parameter tolerances, analog design for yield and reliability, hierarchical sizing of analog circuits, analog/mixed signal test design, discrete sizingof analog circuits, structural analysis of analog and digital circuits, and analog layout synthesis.

Research Projects

  • MEMS Design Constraints and Analog Layout Synthesis
  • Reliability Considerations in Analog Synthesis
  • Power-Down Verification and Analog Layout Synthesis
  • Structure and Symmetry Path Analysis of Analog and Digital Integrated Circuits
  • Sizing of Analog Integrated Circuits towards Lifetime Robustness
  • Constraint-Based Layout-Driven Sizing of Analog Circuits
  • Discrete Sizing of Analog Integrated Circuits
  • Deterministic Hierarchical Placement of Analog Integrated Circuits

Selected Publications

He has published more than 100 papers, six of which were nominated for best papers at DAC, ICCAD, DATE conferences, and two of which received the ITG-Prize and the GMM-Prize, respectively. Some selected publications are:

1. M. Zwerger, H. Graeb, Verification of the Power-Down Mode of analog Circuits by Structural Voltage Propagation, Analog Integrated Circuits and Signal Processing, 2013.

2. M. Pehl, H. Graeb, Tolerance Design of Analog Circuits Using a Branch-and-Bound Based Approach, Journal of Circuits, Systems and Computers, Special Issue on Energy and Variability Aware Circuits and Systems, 2012.

3. M. Eick, H. Graeb, MARS: Matching-driven analog sizing, IEEE Transactions on Computer-Aided Design of Integrated Circuits (TCAD), 2012.

4. Xin Pan, H. Graeb, Reliability optimization of analog integrated circuits considering the trade-off between lifetime and area, Microelectronics Reliability, 2012.

5. H. Habal, H. Graeb, Constraint-based Layout-driven Sizing of Analog Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits (TCAD), 2011.

6. M. Eick, M. Strasser, Kun Lu, U. Schlichtmann and H. Graeb: Comprehensive Generation of Hierarchical Placement Rules for Analog Integrated Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits (TCAD), 2011. (GMM-Prize 2012)

7. D. Mueller-Gritschneder, H. Graeb, U. Schlichtmann: A Successive Approach to Compute The Bounded Pareto Front of Practical Multi-Objective Optimization Problems, SIAM Journal on Optimization (SIOPT), 2009.

8. T. Massier, H. Graeb, U. Schlichtmann: The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis, IEEE Transactions on Computer-Aided Design of Integrated Circuits (TCAD), 2009.

9. G. Stehr, H. Graeb, K. Antreich: Analog Performance Space Exploration by Normal-Boundary Intersection and by Fourier-Motzkin Elimination, IEEE Transactions on Computer-Aided Design of Integrated Circuits (TCAD), 2007. (ITG-Prize 2008)


Ceremony on the occasion of the 150th anniversary of the Technical University of Munich in the Herkulessaal of the Munich Residence Group photo in front of press wall; v.l.n.r .: Ilse Aigner, Bavarian Minister of State for Housing, Construction and Transport; Dieter Reiter, Lord Mayor of Munich; Olaf Scholz, Federal Minister of Finance; Prof. Dr. W. A. ​​Herrmann, President of the Technical University of Munich; Federal President Frank-Walter Steinmeier; Dr. Markus Söder, Bavarian Prime Minister; Prof. Dr. Marion Kiechle, Bavarian Minister of State for Science and Art

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