Biography

Chuan Seng Tan received his B.Eng. degree in electrical engineering from University of Malaya, Malaysia, in 1999. Subsequently, he completed his M.Eng. degree in advanced materials from the National University of Singapore under the Singapore-MIT Alliance (SMA) program in 2001. He then joined the Institute of Microelectronics, Singapore, as a research engineer where he worked on process integration of strained-Si/relaxed-SiGe heterostructure devices. In the fall of 2001, he began his doctoral work at the Massachusetts Institute of Technology, Cambridge, USA, and was awarded a Ph.D. degree in electrical engineering in 2006. He was the recipient of the Applied Materials Graduate Fellowship for 2003-2005. In 2003, he spent his summer interning at Intel Corporation, Oregon. He joined NTU in 2006 as a Lee Kuan Yew Postdoctoral Fellow and since July 2008, he is a holder of the inaugural Nanyang Assistant Professorship. His research interests are semiconductor process technology and device physics. Currently he is working on process technology of three-dimensional integrated circuits (3-D ICs). He is a member of IEEE.

Research Interests

• Wafer 3-D/Vertical Integration of ICs
• Group-IV Hetero-epitaxy and Devices

Research Projects

• 3D Wafer Stacking with Considerations on Low Thermo-mechanical Stress and Efficient Heat Dissipation
• Advanced Substrate Engineering
• Big-data Computing System: A 3-D IC Perspective
• High Throughput 3D IC Stacking with Solder-less Cu Bonding
• In-P-on Silicon Bonding
• Metallic Nanoparticles Enabled Low Temperature Processes for Interconnections in Flexible Electronics and 3D Electronics Packaging
• Novel Sensors and Acoustic Transducer for the Down-hole Electronic System (1)
• Novel Sensors and Acoustic Transducer for the Down-hole Electronic System (2)
• Sub Project 3 – CMOS and MEMS Integration via TSV-less Stacking for Smart Micro-Sensor Application
• Sub-project 1 – CMOS-MEMS Integration
• Thermal Management for Integrated Electronics Systems
• Three Dimensionally Stacked MEMS Realized with Low temperature Cu-Cu Diffusion Bonding
• Vertical Integration of MEMS and ASIC

Selected Publications

1. L. Zhang, L. Peng, H. Y. Li, G. Q. Lo, D. L. Kwong, and C. S. Tan. (2012). Operating TSV in Stable Accumulation Capacitance Region by Utilizing Al2O3-Induced Negative Fixed Charge. IEEE Electron Device Letters, , 10.1109/LED.2012.2190968.

2. Y. H. Tan, G. Y. Chong, and C. S. Tan. (2012). Direct bonding of Ge-Ge using epitaxially grown Ge-on-Si wafers. ECS Journal of Solid State Science and Technology, , DOI: 10.1149/2.017201jss.

3. J. Fan, L. Peng, K. H. Li, and C. S. Tan. (2012). Wafer-Level Hermetic Packaging of 3D Microsystems with Low Temperature Cu-to-Cu Thermo-compression Bonding and Its Reliability. Journal of Micromechanics and Microengineering, , doi:10.1088/0960-1317/22/10/105004.

4. Zhang, R. I Made, H.Y. Li, S. Gao, G. Q. Lo, D. L. Kwong, and C. S. Tan. (2011). Spatial Variation of TSV Capacitance and Method of Stabilization with Al2O3-Induced Negative Fixed Charge at the Silicon-Liner Interface. IEEE International Electron Devices Meeting (IEDM).

5. L. Peng, H. Y. Li, D. F. Lim, S. Gao, and C. S. Tan. (2011). High Density 3D Interconnect of Cu-Cu Contacts with Enhanced Contact Resistance by Self-Assembled Monolayer (SAM) Passivation. IEEE Transactions on Electron Devices, , 10.1109/TED.2011.2156415.