BIOGRAPHY

Prof. Tony T. Kim received the B.S. and M.S. degrees in electrical engineering from Korea University, Seoul, Korea, in 1999 and 2001, respectively. He received the Ph.D. degree in electrical and computer engineering from University of Minnesota, Minneapolis, MN, USA in 2009. From 2001 to 2005, he worked for Samsung Electronics where he performed research on the design of high-speed SRAM memories, clock generators, and IO interface circuits. In 2007 ~ 2009 summer, he was with IBM T. J. Watson Research Center and Broadcom Corporation where he performed research on isolated NBTI/PBTI measurement circuits and SRAM Mismatch measurement test structure, and battery backed memory design, respectively. In November 2009, he joined Nanyang Technological University as an assistant professor.

Prof. Kim received 2008 AMD/CICC Student Scholarship Award, 2008 Departmental Research Fellowship from U. of Minnesota, 2008 DAC/ISSCC Student Design Contest Award, 2008 Samsung Humantec Thesis Award (Bronze Prize), 2005 ETRI Journal Paper of the Year Award, 2001 Samsung Humantec Thesis Award (Honor Prize), and 1999 Samsung Humantec Thesis Award (Silver Prize). His current research interests include low power and high performance digital, mixed-mode, and memory circuit design, ultra-low voltage sub-threshold circuit design for energy efficiency, variation and aging tolerant circuits and systems, and circuit techniques for 3D ICs. He is a member of IEEE.

RESEARCH INTERESTS

• Low power and high performance digital, mixed-mode, and memory circuit design
• Ultra-low voltage sub-threshold circuit design for energy efficient systems
• Variation and aging tolerant circuits and systems
• Circuit techniques for 3D ICs.

CURRENT PROJECTS

• Radiation-Resilient Microcontroller for Small-Satellite Applications
• Time Domain Ultra-low Voltage Analog-to-digital Converter Design For IoT Applications

CURRENT GRANTS

• Advanced ReRAM Technology For Embedded Systems
• Demonstrators and System Integration
• Energy-Efficient and Endurable Memory Interface Circuits (WP 1 and WP3)
• Memristive Halide Perovskites for Next Generation Embedded Neuromorphic Computing
• Origami AlGaN/GaN Optoelectronics for Ultraviolet Hemispherical Electronic Eye Systems
• Project ARIDEN
• Resistive Memory Endurance Enhancement Utilizing Smart Mitigation and Recovery Techniques

PATENTS

US 2018/0019661 A1: Device And Method For Energy Harvesting Using A Self-Oscillating Power-On-Reset Start-Up Circuit With Auto-Disabling Function (2018)
Abstract: Device and method for energy harvesting using a self-oscillating power-on reset start-up circuit. The device for energy harvesting comprises a start-up circuit for generating self-oscillation and initial boosting of an input voltage from an energy source during a start-up phase; a main boost circuit for boosting the input voltage during a steady state phase; a clock generator circuit for generating clock signals which control voltage boosting of the main boost circuit during the steady state phase; and a switching circuit coupled to the start-up circuit, the main boost circuit and the clock generator circuit for switching powering of the clock generator circuit between the start-up circuit and the main boost circuit such that the clock generator circuit is powered by only one of the start-up circuit and the main boost circuit at any point in time.

KEY PUBLICATIONS

1. N. S. Pham and T. Yoo and T. T. H. Kim and C. G. Lee and K. H. Baek. (2017). A 0.016 mV/mA Cross-regulation 5-Output SIMO DC-DC Buck Converter Using Output-Voltage-Aware Charge Control Scheme. IEEE Transactions on Power Electronics, .
2. Taegeun Yoo, Jueon Kim, Kwang-Hyun Baek and Tony Tae-Hyoung Kim. (2017, November). A 0.5 V CMOS Image Sensor with Adaptive Dynamic Range. Paper presented at International SoC Design Conference (ISOCC), South Korea.
3. Karim Rawy, Taegeun Yoo, and Tony T. Kim. (2017). An 88% Efficiency MPPT for PV Energy Harvesting System with Novel Switch Width Modulation for Output Power 100nW to 0.3mW. 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)South Korea: IEEE.
4. W.-G. Ho, K. Z. L. Ne, N. P. Srinivas, K.-S. Chong, T. T.-H. Kim and B.-H. Gwee. (2016). Area-efficient and low stand-by power 1k-byte Transmission-gate-based Non-Imprinting High-speed Erase (TNIHE) SRAM. IEEE International Symposium on Circuits and Systems, ISCAS.
5. Jian Sen Teh, Anh-Tuan Do, Tae-Hyoung Kim, Liter Siek. (2015). EDSSC 2015, Conference on Electron Devices and Solid-State Circuits: A 28.4 pJ per Conversion ISFET-based pH Sensing Design for Low-Energy Applications. EDSSC 2015, Conference on Electron Devices and Solid-State Circuits (pp. 174 – 177)IEEE.